1. Field of the Invention
The present invention relates to an A/D (analog-to-digital) converting device and, more-particularly, to an A/D converting device which has so-called parallel type A/D converters arranged in two or more stages in order to provide a higher processing speed and a higher resolution.
2. Description of the Related Art
FIG. 1 is a block diagram that illustrates the arrangement of a conventional A/D converting device which comprises two or more stages of parallel type A/D converters or a conventional so-called serial-parallel type A/D converting device.
As shown in FIG. 1, an analog input is digitized in a first stage by a parallel type A/D converter 1 and as is temporarily stored in an analog data holding section 2 constituted by, for example, a sample and hold circuit or an analog delay line.
Then, an analog value that is the output of A/D converter 1 is converted by a D/A converter 3, and the original analog input values stored in analog data holding section 2 are supplied to an adder amplifier 4 constituted by, for example, an operation amplifier. This adder amplifier 4 properly amplifies the difference between these two received analog values, thereby providing an analog value corresponding to the difference between the original analog input value and the output of A/D converter 1 of the first stage.
The analog value corresponding to the difference is digitized by a parallel type A/D converter 5 of the next stage.
An adder 6 adds, and synthesizes, the output of the first stage A/D converter 1 as the higher bits and the output of the next stage A/D converter 5 as the lower bits so as to produce a digital output value with a high resolution, and sends it out to an external unit.
In other words, according to this A/D converting device, an analog input value is roughly digitized in the first stage A/D converter 1, the remaining, nondigitized analog value, i.e., the conversion error of the first stage A/D converter 1, is finely digitized in the next stage A/D converter 5, and these digital values are synthesized by adder 6. Accordingly, a combination of low-resolution A/D converters 1 and 5 can constitute a high-resolution A/D converting device, and, what is more, using high-speed parallel type A/D converters as A/D converters 1 and 5 can realize a high speed processing and a high resolution.
Although, in the example of FIG. 1, parallel type A/D converters are arranged in two stages to provide a high resolution, the same type of A/D converters may be arranged in greater stages, e.g., three, four, etc., to realize a higher resolution.
Since such a conventional A/D converting device uses many analog elements such as analog data holding section 2 and adder amplifier 4, a change in ambient temperature causes a large change in conversion accuracy. Therefore, the convention A/D converting device has a narrow temperature range for sufficient conversion accuracy, has an inevitable change in conversion accuracy with time and should reduce the yield in order to improve the accuracy, thus increasing the cost of the device.